Not videos. Not slides. Every module is a working interactive reference built from real engineering practice — concepts, diagrams, and applied problems you actually use.
Not videos. Not slides. Every module is a working interactive reference built from real engineering practice — concepts, diagrams, and applied problems you actually use.
The design mindset · Why simulation isn't enough · Tools stack · Course map
What a PSU actually does · Spec as a design input · Topology selection · Waveform reading · Tools workflow
PMOS LDO architecture · ESR window vs anyCAP · Feedback divider · Load transient · PSRR three-mechanism model
Volt-second balance · CCM/DCM transition · Loss budget · Shooting method steady-state · Closed-loop load step
RHP zero physics · Bandwidth limitation · Startup overshoot · Soft-start design · Reverse recovery experiment
Inductor selection · Capacitor selection · Sync vs async rectification · FET thermal budget · PCB layout rules · Full BOM
Isolated energy transfer · DCM waveforms · Leakage spike physics · RCD snubber design · Secondary diode stress
Bipolar excitation · Flux walking to saturation · 0.5% asymmetry simulation · Blocking capacitor self-correction
ZVS mechanism · Two resonant frequencies · Gain curve family · Analytical waveforms · Dead time calculation · 1kW design
Bode plot reading · K-factor method · Type 2 vs Type 3 · TL431+opto gain budget · OCP/OVP/UVLO/soft-start
85–265V AC → 24V/2A · UCC28740 · Transformer design · MOSFET/diode selection · RCD snubber · Type 2 compensation · TL431+opto · Full BOM · PCB layout · LTspice validation
Run MATLAB and LTspice simulations side by side, size every component from equations, and cross-check against TI WEBENCH. Learn by doing, not watching.
MATLAB is primary, but every simulation has a full LTspice equivalent shown alongside it. Scilab and WEBENCH are free too. You will not be blocked by licensing.
Thermal, oscillation, EMC, switching loss. Four root causes the simulation never showed — each calculable before the board was built.