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SI / PI Simulation Training

Decision
Framework
Edition

The decisions tools cannot make for you.

Six live Sunday sessions. PI-first workflow. Model selection, corner conditions, termination, via modelling, jitter analysis, eye diagrams — the engineering judgment that determines whether your simulation result is valid or optimistic fiction.

Sessions
6
Live Sundays
Duration
1.5h
Each session
Batch Size
10
Hard cap
Tools
SIwave
+ HyperLynx
Starts
28 Jun
2026
Reserve Your Seat → View Curriculum
PI-first — not as a convention, as a physical dependency
Ansys SIwave + HyperLynx industry demonstrations
One decision rule per session — stated, derived, applied
Self-paced learning material for all 7 sessions included
"Most SI/PI training teaches you which menu to open. This one builds the judgment you need before you open any tool — because the tool executes whatever you give it, right or wrong."
The VyomEx EDU Philosophy
What You Walk Out With
Six engineering capabilities —
not tool familiarity.

The goal is not knowing which menu to open. It is knowing which simulation to run, why, in what order, using which model, at which corner, against which criterion — and the engineering reasoning behind every single decision.

01

Validate power before trusting any SI result

Derive Z_target from the IC datasheet. Run DC drop, AC impedance, and SSN in the correct sequence. Understand why an SI simulation on an unvalidated PDN is not a result — it is a number produced under an assumption that may not hold on your actual board.

02

Select the correct simulation model every time

Apply the three-criteria framework — component type, frequency range, analysis goal — to every component. Know when RLGC is adequate and when W-element is mandatory. Run the passivity check on every imported S-parameter before a simulation runs.

03

Calculate termination from the IBIS V-I curve

Read Z_driver from the pull-up V-I slope at VDD/2. Calculate R_s = Z₀ − Z_driver. Optimise by running Fast Strong and Slow Weak simultaneously. Never copy a termination value from a reference design built around a different IC.

04

Assess via stub risk before opening any tool

f_stub = c/(4×L×√Dk) — two minutes, before the first simulation is configured. Determine whether the stub needs S-parameter EM extraction or a simple capacitive model. Know which PCIe generation draws the line.

05

Decompose jitter and trace it to a layout cause

Separate DJ and RJ from the eye diagram or a measured waveform. Calculate TJ at the required BER. Identify whether DDJ, PJ, or RJ dominates — and which layout parameter each one points to for the fix.

06

Trace every failure to Geometry, Material, or Topology

Apply the root cause framework to any SI or PI simulation failure. Know which category determines which type of fix. Verify the fix in simulation before changing the layout — not after.

One Decision Rule Per Session
Session 1 · Foundation
Validate power first. Analyse signals second. Every time.
Session 2 · PI Analysis
PDN must present low impedance at every frequency the IC demands current — not just DC.
Session 3 · Model Selection
Model selection from component type, frequency range, and analysis goal — not by default.
Session 4 · Corners & Termination
Fast Strong for overshoot. Slow Weak for timing. Always both. Typical proves nothing.
Session 5 · Via, Crosstalk, Eye
Eye closure is the cumulative cost of every layout decision. The jitter report tells you which one to fix first.
Session 6 · Integration
Every failure maps to Geometry, Material, or Topology. Find it. Fix it. Verify in simulation before touching the board.
Curriculum
Seven modules. One workflow.
Built from the physics up.

Module 0 is self-study material provided before Session 1. Sessions 1 through 6 are live. Every session has a concept block, an industry tool demonstration, and a Q&A block — in that order.

MOD 0
SI/PI Foundations — The Physics Behind Every Simulation
Self-study
Before any tool is opened — build the mental models.
Why boards fail when schematics are correct. Transmission line intuition — characteristic impedance, reflections, propagation delay. PDN as a frequency problem, not a voltage problem. Electromagnetic coupling physics. Signal loss mechanisms — skin effect and dielectric loss, with the frequency scaling formulas. How simulation solvers work and where they silently go wrong. Five field failure patterns mapped to their physical root cause — including the one that only shows up in environmental test.
→ Provided before Session 1 · complete self-paced module included
S1
SI/PI Workflow, Simulation Taxonomy & Analysis Setup
1.5 hr
The complete reference map for every session that follows.
The physical argument for PI-first — not a workflow convention, a consequence of how drivers work. Complete SI/PI simulation taxonomy — what each type computes, what decision it informs, what the field consequence is of skipping it. Board setup: stackup verification, model assignment, VRM modelling, current loads from datasheets — and what the tool silently assumes when you don't supply these. The simulation selection rule by interface type. Industry demo: Ansys SIwave workflow overview.
PI taxonomy SI taxonomy Board setup Selection rule Ansys SIwave demo
→ Decision rule: Validate power first. Analyse signals second. Every time.
S2
DC Drop, AC PDN Impedance & SSN
1.5 hr
Power integrity is not about keeping voltage high. It is about keeping impedance low.
DC drop — the four resistance contributors, R_PDN_max derivation from the IC datasheet, reading the voltage map with the right colour scale. AC PDN impedance — Z_target derivation from V_ripple and I_transient, self-resonant frequency, anti-resonance between capacitor tiers, the three-tier decoupling hierarchy. SSN — V_SSN = N × I_per_buffer × Z_PDN(f_switch), field failure signature, how the fix always connects back to impedance. Industry demo: Ansys SIwave DC drop and AC impedance with Z_target line overlaid.
DC drop derivation Z_target formula Anti-resonance 3-tier decoupling SSN Ansys SIwave demo
→ Decision rule: PDN must present low impedance at every frequency the IC demands current — not just DC.
S3
Simulation Models — IBIS, S-Parameters, Z-Parameters, W-Element
1.5 hr
The wrong model produces a result — not a valid one.
The three-criteria model selection framework. IBIS — V-I curves, waveform tables, package parasitics, clamp diodes, corner model quality signs. S-parameters — passivity check (|S21|² + |S11|² ≤ 1.0), causality check, port assignment errors that the tool never flags. W-element vs RLGC — the skin depth formula, dielectric loss scaling, exactly where the frequency threshold falls for your data rate. Z-parameters in PDN analysis — why port placement changes the result. Industry demo: HyperLynx model assignment and verification.
IBIS corners Passivity check W-element vs RLGC Dk(f) / Df(f) HyperLynx demo
→ Decision rule: Model selection from component type, frequency range, and analysis goal — not by default.
S4
Stimulus, Corner Conditions & Termination
1.5 hr
Typical proves nothing. Simulate the corners that reveal real failures.
PRBS pattern length — why the interface specification mandates a specific length and what shorter patterns hide. The four corner conditions — Fast Strong, Slow Weak, Slow Strong, Fast Weak — each with its physical basis and the specific failure mode it is worst case for. Termination calculation from the IBIS V-I curve: R_s = Z₀ − Z_driver at VDD/2 — for your specific IC, not copied from a reference design. Parallel and AC termination sizing. Why optimisation requires both FS and SW simultaneously. Industry demo: HyperLynx LineSim corner comparison.
PRBS31 FS / SW / SS / FW Z_driver from V-I Series termination HyperLynx LineSim
→ Decision rule: Fast Strong for overshoot. Slow Weak for timing. Always both. Typical proves nothing.
S5
Via Models, Discontinuities, Crosstalk & Eye Diagrams
1.5 hr
Every layout decision has a cost. The eye diagram is the bill.
Via stub resonance — f_stub = c/(4×L×√Dk) — calculated before any tool is opened, decision rule for when EM modelling is required. Back-drill specification. Crosstalk — NEXT/FEXT physics, spacing scaling, saturation length, guard trace via stitching. Eye diagram construction, compliance mask, and failure diagnosis table. Jitter decomposition: DJ, RJ, DDJ, PJ — each mapped to layout root cause. Jitter extraction from a measured time-domain waveform — measuring DJ_pp, σ_RJ, calculating TJ at required BER. Industry demo: HyperLynx BoardSim via, crosstalk, eye with compliance mask.
Via stub f_stub NEXT / FEXT Eye compliance mask DJ / RJ / TJ at BER Jitter from waveforms HyperLynx BoardSim
→ Decision rule: Eye closure is the cumulative cost of every layout decision. The jitter report tells you which one to fix first.
S6
Results Interpretation, Design Fixes & Root Cause Analysis
1.5 hr
Every failure has a traceable layout cause. Find it. Fix it. Verify it.
Reading PI results — IR drop, AC impedance excess, anti-resonance, SSN — each with its hardware failure signature and field pattern. Reading SI results — overshoot violation, setup/hold failures, eye height and width, via stub resonance — each mapped to corner condition and root cause category. The Geometry / Material / Topology root cause framework. Common decision gaps — the decisions most often missing or incorrect in SI/PI simulation planning — reviewed as group learning from submitted scope documents.
PI failure signatures SI failure signatures G/M/T root cause Fix verification Group review session
→ Decision rule: Every failure maps to Geometry, Material, or Topology. Find it. Fix it. Verify in simulation before touching the board.
Schedule
Six Sundays. Six sessions.
Built for working engineers.

One session per week. Enough time between sessions to go through the self-paced material, submit questions to WhatsApp, and apply what was covered.

1
Session 1 · Sun 28 Jun
Workflow & Taxonomy
SI/PI simulation taxonomy — what each type computes and what decision it informs
Board setup — what the tool silently assumes when you don't specify
PI-first sequence — physical argument, not procedural convention
Ansys SIwave Demo
2
Session 2 · Sun 5 Jul
DC Drop, PDN Impedance & SSN
Z_target derived from IC datasheet V_ripple and I_transient
Anti-resonance between capacitor tiers — how it forms and how to damp it
SSN amplitude formula and its connection to AC impedance
Ansys SIwave Demo
3
Session 3 · Sun 12 Jul
Simulation Models
IBIS corners — Typical, Fast Strong, Slow Weak — physical basis for each
S-parameter passivity and causality checks — mandatory before any simulation
W-element threshold — where RLGC stops being adequate
HyperLynx Demo
4
Session 4 · Sun 19 Jul
Stimulus, Corners & Termination
PRBS31 — what shorter patterns hide and why the spec mandates it
Four corner conditions — FS, SW, SS, FW — one failure mode each
R_s = Z₀ − Z_driver calculated from IBIS V-I curve, not assumed
HyperLynx LineSim Demo
5
Session 5 · Sun 26 Jul
Via, Crosstalk & Eye
f_stub = c/(4×L×√Dk) — calculated before any tool opens
Crosstalk spacing scaling, saturation length, guard trace stitching rule
Jitter decomposition: DJ_pp and σ_RJ from waveform to TJ at BER 10⁻¹²
HyperLynx BoardSim Demo
6
Session 6 · Sun 2 Aug
Results & Root Cause
PI and SI failure signatures — field pattern for each
Geometry / Material / Topology root cause framework
Group review of submitted simulation scope documents
Full SI/PI Walkthrough
What You Receive
Everything you need —
before, during, and after.

Not just the live sessions. The self-paced material is built with the same depth as the sessions — so you arrive with context and leave with references you will use on actual boards.

📐
Module 0 — SI/PI Foundations (Self-Paced)
The complete physics foundation before Session 1. Transmission line intuition, PDN hierarchy, electromagnetic coupling, skin effect and dielectric loss, simulation solver mechanics, and five field failure patterns mapped to root cause. Provided before the cohort starts.
Included · provided before Session 1
📚
Sessions 1–6 Reference Modules (Self-Paced)
All six session topics as standalone interactive HTML modules — formulas, concept cards, worked examples, and a five-question knowledge check for each session. Use them before the live session to build context, and after as a permanent reference. Includes all formula derivations, decision rule boxes, and root cause tables.
All 7 modules included · lifetime access
📋
Simulation Planning Document Template
The structured SI/PI scope document used in the cohort — Part 1 for PI scope (DC drop targets, Z_target derivations, SSN risk) and Part 2 for SI scope (model selection, corners, termination, via stub assessment, crosstalk risk pairs, eye criteria). Apply it to any board you design.
Reusable on every future board
🎥
Session Recordings + WhatsApp Batch Group
Every live session recorded and shared with the batch within 24 hours. WhatsApp group for pre-session question submission — questions submitted before each session are addressed in the Q&A block. Small batch of 10 means every question gets a real engineering answer, not a generalised one.
Recordings shared within 24 hours
Investment
Two windows. One cohort.

Pricing is structured by enrolment window. The content, material, and access are identical across both tiers. Early Bird closes when the 3 seats fill — not on a fixed date.

Your Details — required before payment
Remaining 7 seats
Standard
₹10,000
7 seats available · closes when filled
Opens once Early Bird fills. Same content, material, and access as Early Bird.
  • 6 live Sunday sessions · 1.5 hours each
  • Module 0 — SI/PI Foundations (self-paced)
  • Sessions 1–6 reference modules (lifetime access)
  • Simulation planning document template
  • Session recordings within 24 hours
  • WhatsApp batch group · pre-session Q&A
Opens after Early Bird seats fill

Seat confirmed only after payment · support@vyomex.in for any questions

"The tool executes whatever model you give it — right or wrong. The decisions that make the difference come before any tool is opened. That is what this cohort is built to transfer."
VyomEx EDU · SI/PI Decision Framework Edition