EMI/EMC BootcampModule 0
Free Preview
Module 0 · Free Preview · No Login Required

You have been designing circuits.
You have not been designing for the real world.

EMI/EMC is not a compliance checkbox. It is the discipline of understanding what electromagnetic energy does to your circuit when nobody is watching — and designing so the answer is nothing.

15Modules
4Design Phases
6Quiz Questions
FreeThis Module

Most hardware engineers encounter EMI/EMC late — at the test lab, during a field failure, or when a product gets returned. This module exists to reframe the problem before that happens. Read the four sections in order. Each one closes a gap you did not know you had.

Section 01

What is EMI/EMC

The coupling triangle. Conducted vs radiated. Emissions vs immunity. The vocabulary that makes the rest of this bootcamp possible.

Section 02

Why Products Fail

Four products that passed every bench test and failed in the field. The root cause in each case was not a mistake — it was a gap in the mental model.

Section 03

Why Standards Exist

Standards are not arbitrary checklists. Each one was written because something failed and someone was harmed. Understanding the origin changes how you read them.

Section 04

The Engineering Mindset

The cost of finding EMC problems at architecture stage vs at the test lab. The three levers every EMC engineer uses. The mindset shift this bootcamp is built on.

Who this module is for
If you have designed PCBs, written firmware, or worked on hardware that was ever tested for EMC — and you are not completely certain why each design decision you made either helps or hurts EMC performance — this module is for you. The gap is not your fault. It was never taught.
01
What is EMI/EMC
The coupling triangle · Conducted vs radiated · Emissions vs immunity

Electromagnetic Interference (EMI) is unwanted electromagnetic energy that disrupts the operation of a circuit. Electromagnetic Compatibility (EMC) is the discipline of designing systems so that they neither generate disruptive EMI nor are affected by it. Every EMC standard, every test, every design rule in this bootcamp traces back to these two definitions.

But definitions are not understanding. Here is the physical reality underneath them.

The core insight
Electromagnetic energy does not stay where you put it. You design a switching node to deliver power to a load. The switching node also radiates. You design a ground plane to be a reference. The ground plane also carries noise currents. Every conductor in your circuit is doing two jobs simultaneously — the one you designed it for, and an electromagnetic one you did not.

The Coupling Triangle

Every EMI problem — without exception — has exactly three components. Remove any one and the problem disappears.

Source

Something generating electromagnetic energy

A switching MOSFET. A clock oscillator. A motor drive. A microcontroller toggling a GPIO. Any circuit element where current or voltage changes with time is an EMI source.

Coupling Path

A mechanism that carries the energy to the victim

Conducted (through shared wires, planes, or supply rails) or radiated (through space as electromagnetic waves). The path is often invisible — a parasitic capacitance, a shared ground impedance, a cable acting as an antenna.

Receptor

Something that is disrupted by the energy

A sensitive analog input. A radio receiver. Another product nearby. Your own microcontroller. The receptor does not have to be fragile — it only has to be sensitive enough at the frequency the source is generating.

Why this model matters
When you debug an EMI failure without this model, you guess. You add a ferrite bead. You add a capacitor. You respin the board. Sometimes it works. You do not know why. With this model, you ask three questions: What is the source? What is the path? What is the receptor? The answer to each question points to a specific design action. Guessing stops.

Conducted vs Radiated — and Why It Matters

⚡ Conducted

  • Energy travels through electrical connections — power cables, signal cables, shared supply rails
  • Measured at the power port using a LISN — a defined test network
  • Dominant at lower frequencies — typically below 30 MHz
  • Primary source: switching power supplies, motor drives, anything with large dI/dt on a shared supply

📡 Radiated

  • Energy travels through space as electromagnetic waves — no wire needed
  • Measured in a chamber at 3m or 10m from the product
  • Dominant at higher frequencies — typically above 30 MHz
  • Primary source: cables acting as antennas, PCB loops, clock harmonics, switching node radiation
The thing most engineers miss
The 30 MHz boundary between conducted and radiated is a measurement boundary, not a physics boundary. A 500 kHz switching supply generates harmonics well above 30 MHz. Those harmonics travel conducted on the power cable — then the cable re-radiates them. The failure shows up in the radiated scan. The root cause is in the conducted path. Fixing the wrong one wastes time and money. Modules 2 through 9 teach you to find the right one.
02
Why Products Fail
Four products · Four environments · Four root causes the bench never showed

The bench is a controlled environment. Clean supply, short cables, no adjacent equipment, no RF fields, no switching machinery nearby. Your product is designed on the bench and tested in a chamber — but it lives in neither. It lives in the field, where all of these assumptions break down simultaneously.

Expand each case. The symptom appears first — exactly as an engineer would encounter it. Then the root cause. Then what needed to change.

Consumer Electronics
Smart home hub fails FCC Part 15B radiated — 9 dB over limit at 96 MHz
Symptom: dominant emission peak at 96 MHz detected at 3m during final compliance scan
What Happened

The 32 MHz system clock had a 3rd harmonic at 96 MHz. The USB cable attached to the hub during testing picked up common-mode current from the PCB ground and re-radiated it efficiently — a 1m USB cable is a quarter-wave antenna at 75 MHz. Close enough to resonate at 96 MHz.

What Was Missed

The pre-compliance scan was done without the USB cable attached. The board alone passed. Adding the cable — which is part of the standard test configuration — made the cable the antenna. The PCB was not the radiating structure. The cable was.

What Fixed It

A common-mode choke on the USB data lines reduced the common-mode current driven onto the cable. The board layout was not changed. A single component in the right place reduced the 96 MHz emission by 11 dB.

The question this raises — and that Module 11 answers — is: how do you know which cable is the antenna, and where exactly on the cable the common-mode current is being driven from?
Automotive
ADAS camera module fails CISPR 25 — interferes with FM radio receiver
Symptom: FM radio drops signal quality when camera module is active
What Happened

The camera module's LVDS serialiser ran at 400 MHz. Its 3rd harmonic at 1.2 GHz fell within the FM broadcast band. The coaxial video cable — routed near the roof antenna — coupled the interference into the antenna cable through near-field inductive coupling.

What Was Missed

The cable routing was finalised after EMC testing. The system was tested on a bench with cables bundled away from each other. In the vehicle installation, the video cable ran within 30mm of the antenna feeder for 400mm. That proximity created enough mutual inductance to transfer the interference.

What Fixed It

Rerouting the video cable away from the antenna feeder eliminated the coupling path. No component change. No board respin. The fix was mechanical — but only visible if you understood the coupling mechanism first.

Module 11 covers cable routing as an EMC design decision — not a mechanical afterthought. Module 6 covers near-field coupling and why 30mm of separation at 1.2 GHz is not separation at all.
Industrial
Sensor module loses immunity to IEC 61000-4-4 EFT burst — resets at Level 2
Symptom: microcontroller resets during electrical fast transient (EFT) burst test on power port
What Happened

The EFT burst injected fast transients onto the power cable. The transients coupled capacitively through the PCB's power supply filter into the digital ground plane. The ground plane voltage shifted transiently, causing the reset pin of the microcontroller — referenced to that ground — to see a false low.

What Was Missed

The filter components were correctly specified for conducted emission. But the layout placed the filter on the wrong side of the ground plane split — so the transient energy that the filter was supposed to block was actually being injected directly into the digital section's reference plane.

What Fixed It

Moving the filter components to the correct physical location — before the ground plane split — with a short, direct path to chassis ground. Same components. Different placement. The reset pin never saw the transient again.

This is a layout problem, not a component problem. Module 7 and Module 9 cover exactly this — why component placement relative to ground plane topology determines whether your filter works or does nothing.
Medical
Portable monitor fails IEC 60601-1-2 radiated immunity at 3 V/m
Symptom: display corrupts and sensor reading drops to zero during RF immunity scan at 433 MHz
What Happened

The 433 MHz RF field induced a common-mode voltage on the sensor cable. The analog front-end amplifier had a common-mode rejection ratio (CMRR) of 60 dB at DC — but only 20 dB at 433 MHz, because CMRR degrades rapidly with frequency in most op-amp topologies. The induced noise was well within the amplifier's output range and appeared as a valid sensor signal.

What Was Missed

The designer specified the amplifier's DC CMRR — which was excellent. The amplifier's CMRR at RF frequencies was never checked. The datasheet showed it in a graph on page 12. It was never read. The gap between DC CMRR and RF CMRR is where this product failed.

What Fixed It

A common-mode filter on the sensor cable input, with a bypass capacitor to chassis ground at the connector, reduced the RF common-mode voltage by 26 dB before it reached the amplifier. The amplifier's degraded CMRR at RF no longer mattered because the RF energy was removed upstream.

Module 5 covers how to read component datasheets for EMC — specifically, why the parameter that fails in the field is never the one at DC. Module 9 covers front-end filtering for immunity.
The pattern across all four
None of these failures was caused by a wrong component value. None required a board respin at the silicon level. All four were caused by an incomplete mental model — of coupling paths, of frequency-dependent behaviour, of the difference between what a test bench shows and what the real installation does. The mental model is what this bootcamp builds.
03
Why Standards Exist
Engineering memory · Real incidents · How to read a standard as a design input

A compliance standard looks like a list of test levels, measurement methods, and pass/fail criteria. That is how most engineers read it — as a bureaucratic hurdle to clear before shipping. That reading is technically correct and practically useless.

Every test level in every standard was derived from a real measurement of a real threat in a real environment. When a standard says "test at 3 V/m RF field," that field level was chosen because 3 V/m is what a walkie-talkie produces at 1 metre. When a standard says "test with a 2 kV surge," that 2 kV was measured on real industrial power supplies during real switching events. The numbers are not arbitrary. They are the documented physics of the environment your product will live in.

How engineers who understand this read a standard
They extract the test level — say, 2 kV surge on the power port — and work backwards: what does my input filter need to attenuate 2 kV to below the reset threshold of my microcontroller? That gives them a design requirement before the schematic starts. Engineers who don't understand this read the same standard and design the product first, then hope it passes. The first approach costs nothing. The second approach costs a chamber booking, a respin, and three months.

Standards you will encounter — and why they were written

This is not a complete list. It is the minimum you need to understand what you are designing for.

StandardWhat it governsThe incident behind it
CISPR 32Emissions from multimedia and consumer electronics — the limit your product must stay underProliferation of switching power supplies in the 1980s caused measurable degradation of AM and FM broadcast reception in residential areas. CISPR 32 codified the emission limits that prevent it.
FCC Part 15BUS market emission limits — Class A (commercial) and Class B (residential)The FCC received tens of thousands of interference complaints in the 1970s as personal computers entered homes. Part 15 established the limits that made coexistence with broadcast radio possible.
IEC 61000-4-4EFT/burst immunity — how your product must survive fast transients on power and signal portsIndustrial contactor switching on shared supply rails was causing systematic control system failures in manufacturing plants. The burst waveform was derived from measured transients on real industrial panels.
ISO 7637-2Automotive supply transients — load dump, inductive switching, ignition eventsAlternator field collapse events on early automotive electrical systems were destroying unprotected electronic modules. Each pulse waveform in ISO 7637 was measured on a real vehicle electrical system.
IEC 60601-1-2Medical equipment EMC — emissions and immunity for equipment near patientsDocumented interference to active implantable devices (pacemakers) from electronic equipment in clinical settings. The immunity test levels reflect the field strengths generated by clinical equipment at patient proximity.
MIL-STD-461Military electronics — emissions and susceptibility across the full frequency rangeElectromagnetic interference between co-located military systems — radar, communications, weapons — on shared platforms caused operational failures. MIL-STD-461 defines the separation requirements between systems on the same platform.
What Module 5 covers that this section cannot
Knowing that standards exist and knowing how to read them as design inputs are different skills. Module 5 teaches you to extract immunity test levels as design requirements — filter cutoff frequencies, isolation voltages, clamp ratings, cable shield termination — before you open a schematic. That skill alone changes how you design every product you will ever build.
04
The Engineering Mindset
The cost curve · The three levers · What this bootcamp changes

There is a specific moment in most hardware projects where EMC becomes the problem. It is not during architecture. It is not during schematic. It is not during layout. It is in the test lab, four weeks before ship date, when the product fails radiated emissions by 8 dB and the options are a board respin, a metal enclosure nobody budgeted for, or a costly retest cycle.

That moment is expensive not because EMC is hard. It is expensive because all the decisions that determine EMC performance were already made — in the stackup, in the schematic, in the layout — by people who were not thinking about EMC when they made them.

The Cost of Finding Problems Late

Stage 01
Architecture — domain partitioning, interface planning, power topology
An EMC decision made here costs nothing to implement. Separating noisy and sensitive domains, choosing a switching frequency that avoids a critical band, specifying a 4-layer stackup instead of 2-layer — these are decisions made in a document, before any component is placed.
Cost: 1×
Stage 02
Schematic — component selection, filter placement, ESD strategy
A ferrite bead in the right place on a schematic costs ₹15 and 5 minutes. The same decision made after a failed compliance test costs a component change, a board respin, and a retest. The component did not change. The timing did.
Cost: 3×
Stage 03
Layout — stackup, return paths, loop area, placement
A layout change to reduce switching loop area takes a few hours. The same change after a failed test requires re-routing adjacent nets, re-running DRC, a new fab run, and assembly. The layout change is identical. The context multiplies the cost.
Cost: 10×
Stage 04
Test lab — chamber failure, respin, retest
A chamber booking costs ₹80,000–2,00,000. A respin adds 3–6 weeks. A delayed launch loses market position. And the root cause — a 4 cm² switching loop that should have been 0.5 cm² — was visible in the layout for weeks before anyone looked.
Cost: 50–100×
Stage 05
Field failure — recall, liability, reputation
This is not a cost you can calculate in advance. It is only calculable after it happens. The products in Section 02 of this module represent this stage.
Cost: incalculable

The Three Levers

Every EMC solution — every ferrite bead, every ground plane, every shielded cable, every filtering capacitor — is an application of one of three levers. Understanding which lever you are pulling, and why, is what separates reactive EMC debugging from proactive EMC design.

Lever 01

Suppress at the Source

Reduce the amplitude or rate of change of the interfering signal at its origin — slower switching edges, lower switching frequency harmonics, smaller loop area for the switching current. The most effective lever. Applied at architecture and layout stage.

How to apply this systematically → Modules 2, 7, 10
Lever 02

Break the Coupling Path

Interrupt the mechanism that carries energy from source to receptor — filtering on power ports, isolation on signal interfaces, shielding around radiating structures, ground plane continuity that forces return current to follow a controlled path.

How to apply this systematically → Modules 9, 11, 12
Lever 03

Harden the Receptor

Make the victim circuit less sensitive to the interference — differential signalling with wide common-mode range, decoupled supply rails, input filtering on sensitive analog inputs, firmware-level noise rejection. The last resort, but sometimes the only option.

How to apply this systematically → Modules 5, 8, 12
The mindset shift
Engineers who do not have this mental model apply levers randomly — add a ferrite bead, add a capacitor, add a shield — and measure whether it helped. Engineers who have it apply levers deliberately, at the correct stage, to the correct part of the coupling path. The result is a product that passes the first time. Not because of luck. Because the decisions were made before the problem could form.
05
Course Map
15 modules · 4 phases · One complete engineering process

The bootcamp follows the real hardware engineering process — from building the mental model, through the full design flow, into domain-specific deep dives, and out through testing and certification. Each module delivers one complete piece of the engineering capability.

Phase 1 — Build the Mental Model · Modules 0–3
M0Why EMI/EMC Exists — Coupling Triangle, Failure Cases, Standards, MindsetFree
M1The EMI/EMC Problem Space — conducted, radiated, near field, far field, frequency domainenrolled
M2How Noise is Born — dI/dt, dV/dt, return current physics, common vs differential modeenrolled
M3The EMC Engineering Mindset — three levers applied, design-for-EMC workflow, pre-compliance strategyenrolled
Phase 2 — Design it Right · Modules 4–9
M4System Architecture & EMC Planning — domain partitioning, power topology, interface planningenrolled
M5Schematic-Level EMC — component selection, filter placement, reading standards as design inputsenrolled
M6Stackup & Return Path Fundamentals — reference planes, return current continuity, plane splitsenrolled
M7PCB Layout for EMC — loop area, switching node handling, decoupling placement, stitching viasenrolled
M8Grounding — The Most Misunderstood Topic — single-point, multi-point, chassis, common impedanceenrolled
M9Filtering, Shielding & Protection — CM chokes, LC filters, TVS, enclosure shielding, aperture rulesenrolled
Phase 3 — Domain-Specific Deep Dives · Modules 10–12
M10Power Electronics & Switching Noise — SMPS EMI mechanisms, hot loop, gate drive, conducted filter designenrolled
M11Cables, Connectors & Board Interfaces — CM current on cables, shield termination, filtered connectorsenrolled
M12Firmware-Level EMC — clock spreading, GPIO slew control, PWM harmonics, DMA as noise sourceenrolled
Phase 4 — Test, Debug & Ship · Modules 13–15
M13Pre-Compliance Testing Workflow — near-field probing, spectrum analyser, DIY pre-scan setupenrolled
M14EMC Chamber Testing — What Actually Happens — test setup, EUT configuration, reading resultsenrolled
M15Debugging EMI Failures & Case Studies — systematic root cause, real boards, real fixesenrolled

Ready to build this capability?

Self-paced access · All 15 modules · Design checklists · Scenario-based quizzes · Built by a practicing hardware engineer

06
Module Quiz
6 scenario-based questions — explanations reveal after every answer

These are not definition questions. They are engineering scenarios — the kind you encounter on real projects. Answer based on what you read in this module.

Question 01 of 06
A product passes pre-compliance radiated emission testing without any cables attached. It then fails full compliance testing with cables attached — 11 dB over the limit at 144 MHz. Without any other information, what is the most likely explanation?
Question 02 of 06
You are reviewing a schematic and notice that the EMC filter components on the power input are placed after a large bulk capacitor. The filter is designed to meet IEC 61000-4-5 surge immunity. What problem does this placement create?
Question 03 of 06
An engineer adds a ferrite bead to reduce conducted emissions on the 5V supply rail. After re-testing, conducted emissions at 10 MHz are unchanged but emissions at 200 MHz have increased. What is the most likely reason?
Question 04 of 06
A compliance standard specifies a radiated immunity test at 10 V/m from 80 MHz to 1 GHz. How should a hardware engineer use this specification during the design phase — before the schematic is complete?
Question 05 of 06
Two engineers are debugging a radiated emission failure. Engineer A says: "add more filtering on the power rail." Engineer B says: "find the source, identify the coupling path, then decide." Which approach is more likely to result in a first-time fix — and why?
Question 06 of 06
A product is in layout stage. The engineer notices that the switching loop of the SMPS covers approximately 3 cm². Reducing it to 0.5 cm² requires moving two components and re-routing three traces — about 2 hours of work. Should they do it?
0 / 6
Quiz complete

The rest of the bootcamp goes deeper on every answer above.

15 modules · Full design flow · Pre-compliance through chamber · Built by a practicing hardware engineer